1. Design and Implementation of an On-Chip Permutation Network for Multiprocessor System-On-Chip

  2. Difference-Set Codes for Memory Application

  3. Resolution of Diagnosis Basedon Transition Faults

  4. Low-Powerand Area-Efficient Carry Select Adder

  5. Transactions Briefs Accumulator Based 3-Weight Pattern Generation

  6. Area-Efficient Parallel FIR Digital Filter Structures for Symmetric Convolutions Basedon Fast FIR Algorithm

  7. A True Random-Based Differentia Power Analysis Counter measure Circuit for an AES Engine

  8. Low-Power Pulse-Triggered Flip-Flop Design With Conditional Pulse-Enhancement Scheme

  9. A High-Accuracy Adaptive Conditional-Probability Estimator for Fixed-Width Booth Multipliers

  10. Soft Error Sensitivity Evaluation Of Microprocessors by Multilevel

  11. Emulation-Based Fault Injection

  12. Pattern Run-Length for Test Data Compression

  13. A Multistep Tag Comparison Method for a Low-Power L2 Cache

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